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What's at 3600000 on a RISC PC running RO3.7x/4.x? |
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sirbod (20:15 2/1/2014)
Phlamethrower (21:00 2/1/2014)
sirbod (00:52 3/1/2014)
Phlamethrower (08:18 3/1/2014)
sirbod (09:25 3/1/2014)
Zarchos (09:32 3/1/2014)
sirbod (11:38 3/1/2014)
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Jon Abbott |
Message #122907, posted by sirbod at 20:15, 2/1/2014 |
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Whist adding hardware scrolling support to ADFFS, I've noticed writes to 3600000 succeed in SVC. According to PRM5a-41, 3600000-3700000 (54mb) is "Reserved for future expansion", so I'd expect nothing to be there and to see Aborts.
If I use OS_Memory to see what's there, it reports "Address not recognised". Double checking with *DEBUG / *MEMORY 3600000 I can see it's full of FFFFFFFF - it looks like the full 1mb is mapped.
Searching through the RO5 source, it looks like MEMC2 is mapped there - should the PRM say "MEMC2" instead of "Reserved for future expansion"?
If anyone has any documentation on IOMD, I'd dearly love a copy. The only thing I've found is the RPC TRM, which doesn't go into any detail on values, although it does list the registers. |
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Jeffrey Lee |
Message #122908, posted by Phlamethrower at 21:00, 2/1/2014, in reply to message #122907 |
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Searching through the RO5 source, it looks like MEMC2 is mapped there - should the PRM say "MEMC2" instead of "Reserved for future expansion"? Not really, since there is no MEMC in IOMD systems (MEMC was superseded by the ARM's builtin MMU, remember)
My guess is that there really is nothing there, and the only reason that you can read/write to it is because (a) the OS maps in all the IO memory in one big block on startup and (b) IOMD doesn't bother faulting invalid IO address ranges (or the range is deliberately configured to return &FFFFFFFF to allow future expansions to be detected by software)
If anyone has any documentation on IOMD, I'd dearly love a copy. The only thing I've found is the RPC TRM, which doesn't go into any detail on values, although it does list the registers. I don't have an IOMD manual, but the ARM7500 and ARM7500FE datasheets are good substitutes and are widely available on the 'net. They list the entire range &3500000 to &3FFFFFF as being reserved. |
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Jon Abbott |
Message #122909, posted by sirbod at 00:52, 3/1/2014, in reply to message #122908 |
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I think I need a break - of course there's no MEMC on IOMD!
I'll unmap &3600000-&3700000 and see what happens.
So the OS is actually throwing away 1mb of RAM - that was quite a chunk back in the day with 32mb machines. |
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Jeffrey Lee |
Message #122910, posted by Phlamethrower at 08:18, 3/1/2014, in reply to message #122909 |
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So the OS is actually throwing away 1mb of RAM - that was quite a chunk back in the day with 32mb machines. Who says there's any RAM mapped there? |
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Jon Abbott |
Message #122911, posted by sirbod at 09:25, 3/1/2014, in reply to message #122910 |
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True, I suppose I should investigate first.
I did try GameOn! last night, as it's supposed to support hardware scrolling on the RPC to see what it did. Either. I have an old version, or it wasn't fully developed as it didn't map out the range and suffered DMA overrun with VRAM, where it wasn't accounting for the SAMlength. With DRAM it just hung the machine. |
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Xavier Louis Tardy |
Message #122912, posted by Zarchos at 09:32, 3/1/2014, in reply to message #122911 |
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Hi.
Strange as with GameOn! I had hardware vertical scrolling (as implemented on a RO 3.11 Archie, directly talking to the MEMC) working on an RPC (with 1 Mbyte VRAM)... |
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Jon Abbott |
Message #122913, posted by sirbod at 11:38, 3/1/2014, in reply to message #122910 |
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The L1PT entry (at &2C0C0D8) is &03600412, which is a Section. I've mapped it out and all seems okay.
Xavier - I'll eMail you, I think I have an old version.
[Edited by sirbod at 11:44, 3/1/2014] |
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